Transistors, such as metal oxide semiconductor field-effect transistors (MOSFETs), are the core building blocks of the vast majority of semiconductor devices. Some semiconductor devices, such as high performance processor devices, can include millions of transistors. For transistors having a planar architecture and a single gate electrode, decreasing transistor size has traditionally been the primary means of achieving higher device densities with ever increasing numbers of transistors on a single device chip.
Transistors having a non-planar architecture and more than one gate electrode have also been investigated as a means of increasing device density. A FinFET is a type of non-planar transistor that has one or more conductive fins that are raised above the surface of a substrate and extend between a source and drain region acting as a channel for the device. The fins may be fabricated using a procedure that includes the formation of thin sidewall spacers adjacent the sidewalls of larger, sacrificial features called “mandrels.” These spacers are formed by an anisotropic etch of a blanket-coated and conformal, generally dielectric, layer overlying the mandrel. Following formation of the spacers, the sacrificial mandrels are selectively removed leaving the sidewall spacers remaining. These spacers then are used as etch masks for pattern transferring into the substrate to form fins. Because sidewall spacers are formed by an anisotropic etch along the sidewall of a substantially straight-walled mandrel, they typically have one substantially straight and vertical sidewall (the side adjacent the mandrel) and one contoured sidewall (the sidewall away from the mandrel). The contoured sidewall is typically characterized by a rounded and sloping upper portion that often terminates with a facet and/or a point. The rounded/faceted profile of spacers can be undesirable because the final fin structure may assume a similar non-rectangular profile that mimics the spacer as a result of the pattern transfer process. Because the gate of a FinFET device is also a raised structure that conformally wraps about the fin, such rounding or faceting of the fin adversely affects the length and shape of the channel resulting in inconsistent performance in these devices.
Because spacers are formed on the sidewalls of a mechanically more robust mandrel, they can be formed with a smaller base dimension and a larger aspect ratio (ratio of feature height to smallest base width) than would be possible using conventional lithographic means. However, the high aspect ratio makes spacers more fragile and susceptible to defect formation due to spacer collapse during processing. Wet etchants, often preferable for their high selectivity in removing certain mandrel materials, generate considerable viscous and capillary forces that tend to exacerbate such collapse creating yet more defects.
Accordingly, it is desirable to provide methods for fabricating FinFET transistor devices using planarized spacers having a more rectangular profile and a reduced aspect ratio that result in improved fin profiles and fewer defects. Further, other desirable features and characteristics of the present invention will become apparent from the subsequent detailed description of the invention and the appended claims, taken in conjunction with the accompanying drawings and this background of the invention.